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Single-Board Universal Module
- PhracturedBlue
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Of course I haven't done the analysis. that would make it sound like I know what I'm doing (which I don't). I have tried runningsmith-chart analysis on the design, but as I can't get anywhere near 50 ohm matching on any of the reference designs, I gave up on that. Instead my goal was to follow the reference designs as closely as possible and hope for the best. However, all of the reference deisgns I have are for 2-layer boards, which doesn't make it clear what the answer is when having a 4-layer ground plane. I know that sharing vias is bad since they act as inductors and throw the filter off, so I purposely did not connect any of the filter caps to the ground pour so there is no cross talk. of course that adds extra inductance, but I'm not sure which is worse.
So in your opinion I'd be better off allowing the pour to connect to the shunt capacitors in all of the filter networks? Or are you only referring to the output from the RFX amplifier?
By the way if you are so inclined, feel free to update my brd file. it is obvious you have more RF experience than I do, and I'll take all the help I can get.
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- octagon
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I'm not saying the design is not going to work, but "best practices" should be employed to minimize later head-scratching.
Most commonly done is pouring ground all over the top layer, via sharing is not a problem if you add sufficient amounts of them. Add a couple of extra ground vias on critical points, the current will follow the least impedance. More and larger is merrier.
4-layer RF wise is usually only different in that the RF circuit has a much thinner dielectric, making life easier with shorter/better ground vias, reasonable line widths, and of course more space for control- and power routing. 10-mil PCB's are not easy to deal with, and have to be supported.
I'm not yet convinced that a fat power plane is necessary when the current draw is weak, given a choice I'd make some room around the perimeter on a power plane for signal lines rather than have these cut off continuous ground paths. (the Cypress reference has a power bus.)
On this board there is not much sharing between the four chips as only one is used at a time, so sharing would be limited to between the RF-generator, switch, PA, and low pass filter.
The manufacturers recommended layouts should be safe bets, I asked the NRF people about their layout and it turns out that grounding of their chip is non-critical as its output is differential. The same holds for the other parts. Cypress offer a very nice guide and layout examples. www.cypress.com/?rID=34190
Ground vias under the RF chips also have the function of conducting away heat. They will also wick away excess solder paste to keep the part from floating away from connections, and will pull the part down to the board. Sounds simple but I've been surprised some very talented people have missed this.
No doubt many RF PCB designs have a lot of overkill, which is the fastest and most economical way to solve the design issues. If you have a resource for free then use it.
I'll take look at submitting a board design, but as a variation on yours, as I'm clueless (almost) on the digital parts.
Sorry stating a lot of obvious things.
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- PhracturedBlue
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- PhracturedBlue
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which is likely where I got the idea to keep independent vias to the gnd plane.Each decoupling capacitor ground pad should
be connected to the ground plane using a
separate via. Direct connections between
neighboring power pins will increase noise
coupling and should be avoided unless
absolutely necessary.
The a7105 layout doesn't seem to follow the same rules though. Basically I'm pretty clueless about this whole RF thing.
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- octagon
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Noise would be a bigger problem when the chip is used in receive mode.
The TI 2500 design has thermal reliefs on all components, while this may very well work, it does not improve RF performance, but is of course to make reflow process easier, with less tomb-stoning etc. For a small board like this I do not think tomb-stoning will be a problem at all.
Their layout should be adaptable in this design. It does not look too sprawled out.
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- octagon
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p.7
11 Verify that the top ground pours are stitched to the ground plane layer and bottom layer with many vias around the RF signal path. Compare to the reference design. Vias on the rest of the board should be no more than λ/10 apart.
λ/10 at 2.4 GHz should be like 12.2 mm. Considering the velocity factor for a PCB with DK of 3.67, (1/sqrtDK) ~ 0.521 this 12.2mm shrinks via spacing to less than 6.4 mm apart.
I don't know what the shield physically looks like, but perhaps its footprint should be made into a part, to make it easier to move without mangling it.
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- PhracturedBlue
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I think we have pretty good coverage from a RF blocking perspective. 6.4mm is ~250mils, and I think the via density is higher than that generally.
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- PhracturedBlue
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- octagon
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If so Laird has 32x32mm and 26.21x26.21mm shields with snap on lids, but I can't locate this rectangular shield. The Laird shields are good and not too expensive
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- PhracturedBlue
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The problem is that the board dimensions cannot be changed, and the location of JP2 cannot move relative to the board coordinates. That makes it quite difficult to get the 32mm shield to fit without obstructing the U.FL or mounting holes. For the 26.2mm shield, it requires moving the RF chips closer together which would probably require a complete re-layout.
I'm not sure how to determine if it is needed without sending a functional board off for testing.
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- octagon
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Do you have .step file of the housing this board fits inside, or some approximation?
The four mounting holes (which I think should be vias) and JP2 could be made into a library "part" to keep them together, avoiding the risk of them getting pushed away. It looks like this board vendor can do vias at this size, which will be a perfect grounding for the PA and antenna.
I normally do not add a "route" to the ground side of decoupling caps etc, the polygon pour takes care of that. Moving a ground via with strings attached can lead to mistakes. I'm using the demo version so I will not be able to submit a 4L design.
I'm getting a few DRC errors.
Getting a custom shield made will cost a few grand to tool up. If the 32mm shield can be used, perhaps just punching a hole in the lid for JP2, if it would ever be necessary, could work. The main reason I can see would be the keep RF from feeding back from the antenna to the input. At +2dBm like many of these modules put out this may not be a problem, but at +20 it may be different.
R/C Transmitter units often have the TX module under a shield. I doubt they want to waste money. Some FCC and ETSI regs may impose some emission- or susceptibility rules that forces this.
I looked at the last version, added some changes.
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- PhracturedBlue
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I decided to try to squeeze the RF under the 26.2mm shield. It is very tight and I'm not sure I'll succeed. I've found other vendors who have a 25x30mm shield that may be easier to work with, but it I'd need to contact them for pricing.
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- PhracturedBlue
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- octagon
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IPX is "100% compatible" with Hirose U.FL and has a thru hole version.
rfconnector.com/ipx-connectors.php
Perhaps not a big deal?
The weak signals with vias in oscillator crystals worry me more. These has not given you any problems? For ~$1.5 you can get sub 25 ppm powered XO's. The 12MHz can be shared.
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- PhracturedBlue
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I too was worried about the xtals on the bottom, but the awa24 board I have does this, and all the xtals seem to be functional on the v0.9 board. A XO would cost twice what the crystals do, so there isn't really much value in changing. I had considered generating the clock from the uC (nd using a xtal to drive it) But generating a 26mhz clock on the stm32 would be difficult, and I don't know that I even have enough IO to make it work
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- octagon
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Higher density connectors can perhaps be considered (0.050" pitch)?
The PPM connector is only using 3 pins, maybe a four pin connector could be used to free up space (of pin 5)?
The 10-pin connector has four unused pins, could these be used the micros pin 37, and 44, 2 x 2 pin connectors?
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- PhracturedBlue
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You can't move Pin1 of the J2 connector. It is critically placed with respect to the board. You cannot use the unused pins of the 10-pin connector either because we don't have any guarantee of how they may be connected in the transmitter.
Also, I don't want to plan for a removable shield. The laird 1-piece and 2-piece shields are footprint compatible, so once the board design is verified, a 1-piece shield would be cheaper to use. so removing the shield to access the mounting holes is not really a viable option. Note that only the corner holes are for mounting. The holes near the RF section are just to allow for pin alignment in the transmitter.
I have completed the design using the 26.8mm shield. In the end, I fit everything without any significant sacrifices. Take a look at the checked in design.
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- PhracturedBlue
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- octagon
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Nice job cramming all the parts into the smaller shield!
The output line should be re-routed under the gap in the shield.
The polygons under the switch probably do not help. Its all ground anyway.
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- PhracturedBlue
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I noticed that when I put the shield in, but then forgot about it before I could fix it.
I've checked in updates that should have your changes. FYI, the reason I draw the shield outline on layer-1 is that I normally work with tStop disabled, and without pour shown, and it makes it clear where the shield boundary is. In the end the pour covers it.
FYI, I'm not sure if you've seen the 'eagle_diff' tool here:
github.com/fxkr/eagle-diff
I've been using it to compare revisions of the board and find it really handy.
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