Can't connect st-link to devo8

Hi,

I have an st-link v2 connected to the jtag/swd port of the tx, but I can't get a connection, not even with the windows st-link tool.
Other than that, I've tried the cli st-util and Openocd on Linux. Openocd seems to get the farthest, but also fails:

openocd -f openocd-devo8.cfg -c "init ;reset init"
Open On-Chip Debugger 0.10.0-dev-00251-g888d5a5 (2016-04-22-01:25)
Licensed under GNU GPL v2
For bug reports, read
openocd.org/doc/doxygen/bugs.html
Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
adapter speed: 1000 kHz
adapter_nsrst_delay: 100
none separate
srst_only separate srst_nogate srst_open_drain connect_assert_srst
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : Unable to match requested speed 1000 kHz, using 950 kHz
Info : clock speed 950 kHz
Info : STLINK v2 JTAG v23 API v2 SWIM v4 VID 0x0483 PID 0x3748
Info : using stlink api v2
Info : Target voltage: 3.222091
Info : stm32f1x.cpu: hardware has 6 breakpoints, 4 watchpoints
stm32f1x.cpu: target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x08000166 msp: 0x20000400
Error: jtag status contains invalid mode value - communication failure
Polling target stm32f1x.cpu failed, trying to reexamine
Examination failed, GDB will be halted. Polling again in 100ms
Info : Previous state query failed, trying to reconnect

and then the last 4 lines repeat.

FWIW, here's my config script:
source [find interface/stlink-v2.cfg]
transport select hla_swd
source [find target/stm32f1x.cfg]
reset_config srst_only srst_nogate connect_assert_srst

The sourced files are untouched by me.

I have no problems connecting to other ST chips, like f0 and f4, but this is the first f1 I've come across.
I've tried to connect under reset with the windows tool also, but without success.

Could this be the low power modes the chip uses? Or could it have something to do with that weird Walkera upload stuff I don't quite understand (what's the deal with that anyway? What is the special Walkera dfu flavour?).

Does any of this sound vaguely familiar to anyone here, and if not, how do you do your debugging on the devos?

Cheers,

Ali

May have something to with write protection options....tried just flat erase? Replacement bootloader should in download section.

Should be worth a try, but I'm a bit reluctant to deliberately brick my chip without even understanding the whole boot and upload process. Anybody care to shed some light on that or provide me with some links to places, where this topic was discussed before? All I seem to find is instructions on how to use those tools, not why they're there.

This has nothing to do with the Walkera upload stuff. That is an obfuscation of the dfu file that has to be understood by both the dfu tool and the bootloader.

The only place I know of where this has been discussed is in a thread on reinstalling the Walkera dfu bootloader on a 7e after replacing the mcu. FWIW, I never managed to talk to my 6s or 10 with an st-link either, and I have worked with other stm32f103 mcus.

The read protection sounds right to me. You might try turning it on on a dev board and seeing if you get the same results. If that's the case, I'd like to hear about it.

Erasing flash with not brick, just blank.
Don't even need bootloader + hardwired bootloader will still be there. I've posted a few times how to load deviation without using walkera loader but appears no one tried, didn't understand or just too clever and dismissed it....

My comment while short same as above.

Or didn't see it for some reason. If like to get away from the Walkera boot loader on my 6 and 10, but never could install my custom dfu firmware on them. Not something I've given priority to, though.