Support for walkera telemetry.

// Wait for the FRC_END_STATE bit in the XACT_CFG register to clear 
while(CYRF_ReadRegister(CYRF_0F_XACT_CFG) & 0x20) {};

void CYRF_SetTxRxMode(enum TXRX_State mode)
 {
     //Set the post tx/rx state
    if (mode == RX_EN)
        CYRF_WriteRegister(CYRF_0F_XACT_CFG, 0x10); // receive mode
    else {
        if (mode == TXRX_OFF)
            CYRF_WriteRegister(CYRF_0F_XACT_CFG, 0x24); // force idle mode
        else
            CYRF_WriteRegister(CYRF_0F_XACT_CFG, 0x28); // force Synth(TX) mode

        // Wait for the FRC_END_STATE bit in the XACT_CFG register to clear
        while(CYRF_ReadRegister(CYRF_0F_XACT_CFG) & 0x20) { ; }
    }

int CYRF_RxPacketIsGood(u8 len)
{
    unsigned rx_state = CYRF_ReadRegister(CYRF_07_RX_IRQ_STATUS);
    if (rx_state & 0x02) {              // receive complete
        if (!(rx_state & 0x01)) {       // RXC=1, RXE=0 then 2nd check is required (debouncing)
            rx_state |= CYRF_ReadRegister(CYRF_07_RX_IRQ_STATUS);
        }
        CYRF_WriteRegister(CYRF_07_RX_IRQ_STATUS, 0x80);    // need to set RXOW before data read.
        u8 length = CYRF_ReadRegister(CYRF_09_RX_COUNT);
        if (((rx_state & 0x25) == 0x20) && length == len) {
            // good data (complete with no errors)
            return 1;
        }
        // else bad data, empty buffer
        while (length) {
            CYRF_ReadRegister(CYRF_21_RX_BUFFER);
            length--;
        }
    }
    return 0;
}

    txState++;
    if(txState == 16) { //2.3msec have passed
        if (CYRF_ReadRegister(CYRF_05_RX_CTRL) & 0x80) { // We're still in receive mode    
            // Disrupt any pending receive by enabling abort    
            // Force End State should not be used to abort a receive if a SOP has already happened.    
            CYRF_WriteRegister(CYRF_29_RX_ABORT, 0x20);
        
            CYRF_RxPacketIsGood(0x00);
        
            // Abort by writing the FRC_END_STATE bit in the XACT_CFG register.    
            CYRF_SetTxRxMode(TX_EN); //Write mode
        
            // Disable abort
            CYRF_WriteRegister(CYRF_29_RX_ABORT, 0x00);    
        } 
        else CYRF_SetTxRxMode(TX_EN); //Write mode
        if(pkt_num == 0) {
            //Keep tx power updated
            CYRF_WriteRegister(CYRF_03_TX_CFG, 0x08 | Model.tx_power);
            radio_ch_ptr = radio_ch_ptr == &radio_ch[2] ? radio_ch : radio_ch_ptr + 1;
            CYRF_ConfigRFChannel(*radio_ch_ptr);
        }
        txState = 0;
    }
    return delay;
}

int delay = 100;
    if (txState == 1) {
        int i = 0;
        while (! (CYRF_ReadRegister(0x04) & 0x02)) {
            if(++i > NUM_WAIT_LOOPS) {
                delay = 1500 - i*5;
                txState = 15;
                break;
            }
        }
        delay = 100 - i*5;

if (txState == 1) {
        int i = 0;
        while (! (CYRF_ReadRegister(0x04) & 0x02)) {
            if(++i > NUM_WAIT_LOOPS) {
                if(CYRF_ReadRegister(0x02) & 0x80) //TX_GO still active
                    RESET_CYRF(); ???
                delay = 1500;
                txState = 15;
                break;
            }

if (txState == 1) {
        int i = 0;
        u8 reg;
        while (++i <= NUM_WAIT_LOOPS)
            reg =  CYRF_ReadRegister(0x04);
            if (reg & 0x02) {
                break;
            }
        }
        if (i == NUM_WAIT_LOOPS || (reg & 0x22) || (CYRF_ReadRegister(0x02) & 0x80)) {
            CYRF_Reset();
            CYRF_Init();
            txState = 15;
            return 1500;
       }
}

static u16 test_reset = 25000;
...
...
    if (txState == 1) {
        int i = 0;
        while (! (CYRF_ReadRegister(0x04) & 0x02)) {
            if(++i >= NUM_WAIT_LOOPS) {
                delay = 1500;
                txState = 15;
                break;
            }
        }     
        test_reset--;
        if(!test_reset) {
            test_reset = 25000;
     	    CYRF_Reset();
            cyrf_init();
            delay = 1500;
            txState = 15;
        }

static u16 test_reset = 25000;
...
...
    if (txState == 1) {
        int i = 0;
        while (! (CYRF_ReadRegister(0x04) & 0x02)) {
            if(++i >= NUM_WAIT_LOOPS) {
                delay = 1500;
                txState = 15;
                break;
            }
        }     
        test_reset--;
        if(!test_reset) {
            test_reset = 25000;
     	    CYRF_Reset();
            cyrf_init();
            cyrf_set_bound_sop_code();
            delay = 1500;
            txState = 15;
        } else {
       if (state == DEVO_BOUND) {
            /* exit binding state */
            state = DEVO_BOUND_3;
            cyrf_set_bound_sop_code();
        }
        if(pkt_num == 0 || bind_counter > 0) {
            delay = 1500;
            txState = 15;
        } else {
            CYRF_SetTxRxMode(RX_EN); //Receive mode
            CYRF_WriteRegister(CYRF_07_RX_IRQ_STATUS, 0x80); //Prepare to receive
            CYRF_WriteRegister(CYRF_05_RX_CTRL, 0x80); //Prepare to receive (do not enable any IRQ)
        }
        }