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Mould King 33043 Super F Quad - HS6200 RF chip
- dc59
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www.mediafire.com/download/10wxe8a938vx9qg/MK33043-01%7E05.zip
It used a HS6200 RF chip, it's is compatible with BK2425, nRF24L01+
www.sunrisedigit.com/en/Show.asp?id=38
Would someone confirm it ? and deviate it ?
But I got problem when I captured SPI data, I can't bint it with quad. if my analyzer connected to TX ......
Thanks a lot.
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- dc59
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- planger
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- dc59
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planger wrote: The nrf24L01 decoder is giving good results at leats right after init. So yes it's a nrf24L01 compatible chip. There are multiple unknown registers at the begining but if there is a datasheet somewhere it should not be an issue.
Hi Pascal,
Thanks for your help. it's a great news to know that's a nrf24l01 compatible chip,
I uploaded the datasheet of HS6200 HERE and hope it could help.
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- goebish
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- goebish
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- goebish
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34 W_REGISTER(06 RF_SETUP) 47
0x47 = 0100 0111, which means 4dbm output, 500kbps, no continuous wave
It might be possible to emulate it with the A7105, but that would require quite a bit of work ...
No, I was wrong, I think it's using 1Mbps after all.
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- dc59
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goebish wrote:
Ok, looks like it's using 500kbps, so there's nothing to do with a NRF24L01
34 W_REGISTER(06 RF_SETUP) 47
0x47 = 0100 0111, which means 4dbm output, 500kbps, no continuous wave
It might be possible to emulate it with the A7105, but that would require quite a bit of work ...
No, I was wrong, I think it's using 1Mbps after all.
Good news ~~ Thanks a lot.
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- mdon
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Any news about using nrf24l01 to clone HS6200? I'm trying unsuccessfully.
What about 0x1E and 0x1F HS6200 registers that are not present in nrf24L01. Analyzing SPI I can see that they are used frequently. Do you have the same situation?
thanks
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- goebish
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I only quickly looked at the captures & datasheet and I think a slight emulation layer will be required as the HS6200 "protocol engine" is not directly compatible with nrf24l01 shockburst mode. (see chapter 7.3 in HS6200 datasheet)
Register 0x1E set the "2 byte guard" among other things, that's 2 extra bytes that are not in nrf24l01 shockburst packets, (it's the same than having n+2 address length actually...) hence it probably needs to be emulated: that mean adding those 2 bytes to the start of the packet, shifting the actual payload 1 bit right because of the 9 bit Packet Control Field (that we have to generate too...) and computing the CRC ourselves... and probably other "fun" stuffs
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- mdon
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I was trying a nrf clone because I don't have another HS6200 unless the one from the controller and couldn't find an easy way to order another. But I will find a solution.
thanks
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- goebish
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When this is confirmed, it shouldn't be hard to emulate ...
Are you working on it already or should I order a MK33043 ?
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- mdon
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in fact It's not the mk33043, but another drone using the same transceiver.
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- goebish
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Try to sniff as I explained, that should help to sort things out
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- mdon
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Sniffing directly the Tx SPI I have this code:
Apparently it uses the HS6200 "protocol engine". I will set the same address, data rate, channel, disable enhanced shockburst, disable CRC and try it out.
I let you know the result
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- goebish
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But at least we should see what can be done to make it compatible with nrf24.
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- mdon
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I'm receiving these messages:
I know sniffing the SPI with a logic analyzer that the transmitter sends the payload: 0x00;0x80;0x40;0x80;0x80;0x40;0x40;0x00;0xBF
As shown:
6.686249 00074 13675 0xB0 0x0E Disable autoack on this specific packet
6.686300 00052 13675 0x00 0xAE Data: 0b00000000 (0x00)
6.686350 00050 13675 0x80 0xA6 Data: 0b10000000 (0x80)
6.686417 00067 13675 0x40 0x60 Data: 0b01000000 (0x40)
6.686467 00050 13675 0x80 0xA8 Data: 0b10000000 (0x80)
6.686535 00068 13675 0x80 0x98 Data: 0b10000000 (0x80)
6.686584 00050 13675 0x40 0x98 Data: 0b01000000 (0x40)
6.686652 00068 13675 0x40 0x98 Data: 0b01000000 (0x40)
6.686702 00050 13675 0x00 0x98 Data: 0b00000000 (0x00)
6.686769 00067 13675 0xBF 0x98 Data: 0b10111111 (0xBF)
I've already shifted the bits to correct 9 bits PCF. My arduino code:
I don't know exactly why it's not working. Any ideas?
Analyzing many cases I can see a pattern, at least for the first payload byte the most significant bit is flipped.
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- goebish
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What are you talking about when you say it doesn't work ? TX emulation ?
edit: ah OK, you're not able to decode the actual payload, I'll have a look at that.
At least there's no occurrence of the word 'scramble' or 'scrambling' in the datasheet
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- goebish
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Maybe payload (and CRC) is xored with a static table, as the xn297, even if it's not stated in the datasheet (or I missed it).
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- goebish
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0x80, 0xf5, 0x3b, 0x0d, 0x6d, 0x2a, 0xf9, 0xbc, 0x51
then check if it works with payloads other than
0x00;0x80;0x40;0x80;0x80;0x40;0x40;0x00;0xBF
... and give me a raw packet please
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